An approach in designing 16-point dft with decimation in time based on rademacher functions

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Zulfikar Zulfikar, Hubbul Walidainy

2018 Journal of Telecommunication, Electronic and Computer Engineering Vol. 10 Issue 2-5 Article Cited by 0 SDG 9SDG 16 Quartile

Abstract

This paper presents a circuit design for 16-point DFT algorithm with Decimation in Time based on products of Rademacher functions. The designed circuit is constructed from two 8-point DFT and four 2-point DFT. However, the operation of the design circuit is different. It utilised the advantages of the similarity of Fourier transforms, and Rademacher functions. Therefore, the proposed design is constructed from previously designed 8-point DFT which is based on products of Rademacher functions. Some analysis of the type of numbers, internal connections and the complex conjugate of the results to achieve the more efficient circuit has been made. Therefore, instead of eight, the proposed design requires only five 2-point DFTs. Therefore, six output results of the design 16-point DFT have been removed since they are equal regarding magnitude to the other results, but six negative circuits are required as compensation. Therefore, the previously designed circuit of 8-point DFT has been replaced with the new circuit design. This circuit is specially designed for non-standalone used; the circuit must be integrated inside the proposed 16-point DFT. © 2018 Universiti Teknikal Malaysia Melaka. All Rights Reserved.

Affiliations

Department of Electrical and Computer Engineering, Syiah Kuala University, Banda Aceh, 23111, Indonesia

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